19 research outputs found

    Delayed Credit Rating Changes, Firm Financing and Firm Performance

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    Motivated by the insufficient research in understanding the influences of the delayed changes in credit ratings, the practical importance of information asymmetry as well as the theoretical difficulty of measuring information gap with an appropriate proxy, this thesis regards delayed credit rating change (DCRC) as a source of asymmetric information and exploits whether and how it affects issuer’s capital structure adjustments. It uses Compustat North America quarterly data from 1985 to 2010 inclusive. Rating agencies often delay updating credit ratings, leading to an information gap between bond issuers and the market. This offers issuers (market insiders) opportunities to utilise the delayed credit rating changes as superior information, alongside which, factors capturing the associated benefits and costs of the rating changes and capital structure adjustments, are addressed to form the three key interactive variables in this research: DCRC, capital structure adjustments and firm performance. First considered are the effects of information asymmetry on financing adjustment before DCRCs. The evidence shows that issuers often adjust debt and equity financing at least one quarter before rating change announcements published by rating agencies. Issuers who anticipate rating upgrades in the next quarter do not significantly change the net debt issuance. Issuers who anticipate rating downgrades increase net debt issuance before rating changes. Secondly, this research is concerned with the robustness of DCRC’s effects, which is confirmed by various robustness check tests and incorporating DCRC into tests of the existing capital structure theories. The result confirms DCRC’s robust effects on firm financing adjustments. The last issue addressed is the relation between information asymmetry and gains or losses to issuers when utilising the information asymmetry. The results suggest that information asymmetry does bring material effects on firm performance. The three groups of results form a mechanism of delayed credit rating change’s real effects and reveal a fresh explanation for issuer’s financing decision making under asymmetric information

    Circuit Techniques for Multiple and Wideband Beamforming

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    University of Minnesota Ph.D. dissertation.June 2018. Major: Electrical Engineering. Advisor: Ramesh Harjani. 1 computer file (PDF); x, 102 pages.This thesis presents different architectures with regard to multiple beamforming and wideband phased array transceiver. Three different designs are implemented in TSMC 65nm RF CMOS to demonstrate different solutions. The design in this thesis have included major RF blocks in state-of-art wireless transceiver: RF receiver, local oscillator, and RF transmitter. First, a RF/analog FFT based four-channel four-beam receiver with progressive partial spatial ltering is proposed. This architecture is particularly well suited for MIMO systems where multiple beams are used to increase throughput. Like the FFT, the proposed architecture reuses computations for multi-beam systems. In particular, the proposed architecture redistributes the computations so as to maximize the reuse of the structure that already exist in a receiver chain. In many fashions the architecture is quite similar to a Butler matrix but unlike the Butler matrix it does not use large passive components at RF. Further, we exploit the normally occurring quadrature down-conversion process to implement the tap weights. In comparison to traditional MIMO architectures, that effectively duplicate each path, the distributed computations of this architecture provide partial spatial ltering before the final stage, improving interference rejection for the blocks between the LNA and the ADC. Additionally, because of the spatial ltering prior to the ADC, a single interferer only jams a single beam allowing for continued operation though at a lower combined throughput. The four-beam receiver core prototype in 65nm CMOS implements the basic FFT based architecture but does not include an LNA or extensive IF stages. This four-channel design consumes 56mW power and occupies an active area of 0:65mm2 excluding pads and test circuits. Second, a wideband phased array receiver architecture with simultaneous spectral and spatial filtering by sub-harmonic injection oscillators is presented. The design avoids using expensive delay elements by many conventional wideband phased array. Different from prior art of channelization which cannot solve beam-squinting issue among the sub-channels, we use sub-harmonic injection locking scheme, which make the center frequencies of all sub-channels point to the same spatial direction to overcome beam-squinting issue. The low frequency, low power and narrowband phase shifters are placed at LO in comparison to conventional way of placing delay elements or phase shifters in the signal path. This avoids receiver performance degradation from delay elements or phase shifters. The simultaneous spectral and spatial ltering dictates less ADC dynamic range requirement and further reduces power. The injection locking scheme reduces the phase noise contribution from the oscillators. The two-band prototype design realized in 65nm GP CMOS is centered at 9GHz, provides 4GHz instantaneous bandwidth, reduces beam-squinting by half, consumes 31.75mW/antenna and occupies 2.7mm2 of chip area. In the third work, a steerable RF/analog FFT based four-beam transmitter architecture is presented. This work is based on the idea of FFT based multiple beamforming in 1st work, but extended to the transmitter and make the all beams steerable. Due to the reciprocity between receiver and transmitter, decimation-in-frequency (DIF) FFT is utilized in the transmitter. All the beams are steered simultaneously by front-end phase shifters, while keep each of the beams is independent of the others. The steerability of FFT based multiple beamforming scheme makes this proposed prototype could tackle more complicated portable wireless environment. The first and second proposed architecture have been silicon veried, and the design of the third has been finished and ready for tapeout

    Corporate financing and anticipated credit rating changes

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    Firm circumstances change but rating agencies may not make timely revisions to their ratings, thereby increasing information asymmetry between firms and the market. We examine whether firms time the securities market before a credit rating agency publicly reveals its decision to change a firm’s credit rating. Using quarterly data, we show that firms adjust their financing structures before credit rating downgrades are publicly revealed. Specifically, firms on average increase their debt financing by 1.29 % before the disclosure of a rating downgrade, and this increase is due to the issuance of debt rather than the repurchase of equity. In contrast, firms do not take significant financing actions before credit rating upgrades
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